Author

Van Tol

PhD Researcher, University of Amsterdam - Cited by 221 - Computer Architecture - Operating Systems - Many-Core

Biography

Van Tol is affiliated to Department of Soil-and Crop-and Climate Sciences. He is a recipient of many awards and grants for his valuable contributions and discoveries in major area of subject research. His international experience includes various programs, contributions and participation in different countries for diverse fields of study.  His research interests reflect in his wide range of publications in various national and international journals.  
Title
Cited by
Year
An implementation of the SANE Virtual Processor using POSIX threads
MW van Tol, CR Jesshope, M Lankamp, S PolstraJournal of Systems Architecture 55 (3), 162-169, 2009200
33
2009
Efficient memory copy operations on the 48-core intel scc processor
MW Van Tol, R Bakker, M Verstraaten, C Grelck, CR Jesshope3rd Many-core Applications Research Community (MARC) Symposium 7598, 2011201
30
2011
A general model of concurrency and its implementation as many-core dynamic RISC processors
T Bernard, K Bousias, L Guang, CR Jesshope, M Lankamp, MW van Tol, ...2008 International Conference on Embedded Computer Systems: Architectures …, 2008200
29
2008
Apple-CORE: Microgrids of SVP Cores--Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management
R Poss, M Lankamp, Q Yang, J Fu, MW van Tol, C Jesshope2012 15th Euromicro Conference on Digital System Design, 501-508, 2012201
21
2012
High level simulation of SVP many-core systems
MI UDDIN, MW van Tol, CR JesshopeParallel Processing Letters 21 (04), 413-438, 2011201
16
2011
An architecture and protocol for the management of resources in ubiquitous and heterogeneous systems based on the svp model of concurrency
C Jesshope, JM Philippe, M van TolEmbedded Computer Systems: Architectures, Modeling, and Simulation: 8th …, 2008200
15
2008
Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores
MI Uddin, CR Jesshope, MW van Tol, R PossProceedings of the 2012 Workshop on Rapid Simulation and Performance …, 2012201
14
2012
Towards scalable I/O on a many-core architecture
MA Hicks, MW van Tol, CR Jesshope2010 International Conference on Embedded Computer Systems: Architectures …, 2010201
13
2010
Apple-CORE: harnessing general-purpose many-cores with hardware concurrency management
R Poss, M Lankamp, Q Yang, J Fu, MW van Tol, I Uddin, C JesshopeMicroprocessors and Microsystems 37 (8), 90-11, 2013201
10
2013
Extending and implementing the self-adaptive virtual processor for distributed memory architectures
MW van Tol, J KoivistoarXiv preprint arXiv:1104.3876, 2011201
9
2011
On mapping distributed s-net to the 48-core intel SCC processor
On mapping distributed s-net to the 4-core intel SCC processorM Verstraaten, C Grelck, MW van Tol, R Bakker, CR Jesshope3rd MARC Symposium, Fraunhofer IOSB, Ettlingen, Germany, 2011201
8
2011
Emulating asymmetric mpsocs on the intel scc many-core processor
R Bakker, MW van Tol, AD Pimentel2014 22nd Euromicro International Conference on Parallel, Distributed, and …, 2014201
7
2014
A characterization of the SPARC T3-4 system
MW van TolarXiv preprint arXiv:110.2992, 2011201
6
2011
A framework for self-adaptive collaborative computing on reconfigurable platforms
MW van Tol, Z Pohl, M TichyApplications, Tools and Techniques on the Road to Exascale Computing, 579-586, 2012201
4
2012
Experiences in porting the SVP concurrency model to the 48-core Intel SCC using dedicated copy cores
R Bakker, MW van TolProceedings of the 4th Many-core Applications Research Community (MARC …, 010
2
2012
An operating system strategy for general-purpose parallel computing on many-core architectures
MW van Tol, CR JesshopeHigh Performance Computing: From Grids and Clouds to Exascale, 157-181, 01101
2
2011

Referred From: https://scholar.google.com/citations?user=L-A0z54AAAAJ&hl=en

Cited by
Citations 221
h-index 9
i10-index 9
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